Erinevus lehekülje "Software Synthesis and Verification" redaktsioonide vahel

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62. rida: 62. rida:
 
** [[Media:ITI0130_Lab7_db2.zip|Secure Database]]
 
** [[Media:ITI0130_Lab7_db2.zip|Secure Database]]
 
** [[Media:ITI0130_Lab7_assignment_cofoja.zip|Cofoja Assignment]]
 
** [[Media:ITI0130_Lab7_assignment_cofoja.zip|Cofoja Assignment]]
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*** [[Media:ITI0130_Lab7_assignment_Instruction.pdf|Instructions]]
  
  

Redaktsioon: 11. aprill 2015, kell 08:35

Course code: ITI0130, ITI8530
Link: http://courses.cs.ttu.ee/pages/ITI0130

Lecturer: prof. Jüri Vain
Contact: juri.vain ätt ttu.ee, ICT-418

Previous courses: 2014


Time and place

Lectures: Wednesdays 14:00, ICT-A1
Labs: Wednesdays 16:00, ICT-401 - Evelin Halling (evelin.halling ätt ttu.ee)

News 2015


Lecture notes

  • Lecture 1: Introduction to formal methods
  • Lecture 2: Modelling state transition systems
  • Lecture 3: Temporal logic CTL*
  • Lecture 4: CTL model checking
  • Lecture 5: Timed automata and TCTL model checking
  • Test 1: Model checking
  • Lecture 7: Program specifications
  • Lecture 8: Proving partial correctness of programs
  • Lecture 9.1: Proof techniques (1): derived rules, backwards proof, annotations
  • Lecture 9.2: Proof techniques (2): Array- and FOR-rule
  • Lecture 10: Proving total correctness of while-programs
  • Test 2: Deductive verification of sequential programs

Labs


Exercises

Resources

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